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| NCP349 Positive Overvoltage Protection Controller with Internal Low RON NMOS FET The NCP349 is able to disconnect the systems from its output pin in case wrong input operating conditions are detected. The system is positive overvoltage protected up to +28 V. Due to this device using internal NMOS, no external device is necessary, reducing the system cost and the PCB area of the application board. The NCP349 is able to instantaneously disconnect the output from the input, due to integrated Low RON Power NMOS (65 mW), if the input voltage exceeds the overvoltage threshold (OVLO) or undervoltage threshold (UVLO). At powerup (EN pin = low level), the Vout turns on ton time after the Vin exceeds the undervoltage threshold. The NCP349 provides a negative going flag (FLAG) output, which alerts the system that a fault has occurred. In addition, the device has ESD-protected input (15 kV Air) when bypassed with a 1.0 mF or larger capacitor. Features http://onsemi.com 6 1 DFN6 MN SUFFIX CASE 506BM MARKING DIAGRAM 1 XX MG G XX = Specific Device Code M = Date Code G = Pb-Free Package PIN CONNECTIONS IN GND FLAG 1 2 3 (Top View) PAD1 IN 6 5 4 EN OUT OUT * * * * * * * * * * * * * * * * * Overvoltage Protection up to 28 V On-Chip Low RDS(on) NMOS Transistor: 65 mW Internal Charge Pump Overvoltage Lockout (OVLO) Undervoltage Lockout (UVLO) Soft-Start Alert FLAG Output Shutdown EN Input Compliance to IEC61000-4-2 (Level 4) 8.0 kV (Contact) 15 kV (Air) ESD Ratings: Machine Model = B Human Body Model = 3 DFN6 1.6x2 mm Package This is a Pb-Free Device Cell Phones Camera Phones Digital Still Cameras Personal Digital Applications MP3 Players ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 11 of this data sheet. Applications Q (c) Semiconductor Components Industries, LLC, 2009 March, 2009 - Rev. 0 1 Publication Order Number: NCP349/D NCP349 Wall Adapter - AC/DC - USB NCP349 7 IN OUT 5 1 4 IN OUT 6 EN FLAG 3 CC/CV Charger or System BATTERY 1 mF VBat 10 k mP ENABLE/ GND Microprocessor 2 0 0 Figure 1. Typical Application Circuit 7 4 INPUT Gate Driver OUTPUT 5 1 VREF Charge Pump EN Block UVLO OVLO Control Logic and Timer 3 EN 6 FLAG 2 GND Figure 2. Functional Block Diagram http://onsemi.com 2 NCP349 PIN FUNCTION DESCRIPTION Pin No. 1, 7 Symbol IN Function INPUT Description Input Voltage Pins. These pins are connected to the Wall Adapoter (AC-DC, Vbus ..). A 1 mF low ESR ceramic capacitor, or larger, must be connected between these pins and GND, as close as possible to the DUT. The two IN pins must be connected together to power supply. (See PCB recommendation for the pin7). Ground Fault Indication Pin. This pin allows an external system to detect a fault on the IN pins. The FLAG pin goes low when input voltage exceeds OVLO threshold or drops below UVLO threshold. Since the FLAG pin is open drain functionality, an external pull-up resistor to VCC must be added. (Minimum 10 kW). Output Voltage Pins. These pins follow IN pins when "no fault" is detected. The two OUT pins must be hardwired together. Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND to a pull down or to a I/O pin. This pin does not have an impact on the fault detection. 2 3 GND FLAG POWER OUTPUT 4, 5 6 OUT EN OUTPUT INPUT MAXIMUM RATINGS Rating Minimum Voltage (IN to GND) Minimum Voltage (All others to GND) Maximum Voltage (IN to GND) Maximum Voltage (All others to GND) Maximum Current (UVLO Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The RqJA is highly dependent on the PCB heat sink area (connected to pin 7). 2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114. 3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. http://onsemi.com 3 NCP349 ELECTRICAL CHARACTERISTICS (Min/Max limits values (-40C < TA < +85C) and Vin = +5.0 V. Typical values are TA = +25C, unless otherwise noted.) Input Voltage Range Undervoltage Lockout Threshold (Note 4) Undervoltage Lockout Hysteresis Overvoltage Lockout Threshold (Note 4) NCP349MNAE Overvoltage Lockout Hysteresis NCP349MNAE Vin versus Vout Resistance Supply Quiescent Current Characteristic Symbol Vin UVLO UVLOhyst OVLO OVLOhyst RDS(on) Idd Conditions - Vin falls down UVLO threshold from 5 V to 2.7 V Vin rises up UVLO + UVLOhyst Vin rises up OVLO threshold Vin falls down OVLO + OVLOhyst Vin = 5.0 V, EN = GND, Load connected to Vout No load. EN = 5.0 V No load. EN = Gnd UVLO Supply Current FLAG Output Low Voltage Idduvlo Volflag VIN = 2.7 V 1.2 V < VIN < UVLO Sink 50 mA on/FLAG pin VIN > OVLO Sink 1.0 mA on FLAG pin FLAG Leakage Current EN Voltage High EN Voltage Low EN Leakage Current TIMINGS Startup Delay NCP349MNAE FLAG Going Up Delay NCP349MNAE Output Turn Off Time toff tstart ton From Vin > UVLO to Vout = 0.3 V (See Figures 3 & 7) From Vout = 0.3 V to FLAG = 1.2 V (See Figures 3 & 9) From Vin > OVLO to Vout < = 0.3 V (See Figures 4 & 8) Vin increasing from 5.0 V to 8.0 V at 3.0 V/ms Rload connected on Vout From Vin > OVLO to FLAG < = 0.4 V (See Figures 4 & 10) Vin increasing from 5.0 V to 8.0 V at 3.0 V/ms Rload connected on Vout From EN > = 1.2 V to Vout < 0.3 V Rload = 5.0 W (See Figures 5 & 12) ms 6.0 6.0 - 10 10 1.5 14 ms 14 5.0 ms FLAGleak Vih Vol ENleak FLAG level = 5.0 V - - EN = 5.0 V or GND Min 1.2 2.8 30 5.53 30 - - - - - - - 1.2 - - Typ - 2.95 60 5.68 60 65 70 140 60 20 - 1.0 - - 1.0 Max 28 3.1 90 5.83 mV 90 110 150 250 - 400 400 - - 0.4 - mW mA mA mA mV mV nA V V nA Unit V V mV V Alert Delay tstop - 1.0 - ms Disable Time tdis - 1.0 5.0 ms NOTE: Electrical parameters are guaranteed by correlation across the full range of temperature. 4. Additional UVLO and OVLO thresholds ranging from UVLO and from OVLO can be manufactured. Contact your ON Semiconductor representative for availability. http://onsemi.com 4 NCP349 TIMING DIAGRAMS UVLO ton Vout 0.3 V Figure 3. Startup Figure 4. Shutdown on Overvoltage Detection EN EN Vout Vin - (RDS(on) FLAG 1.2 V tdis I) 0.3 V FLAG Vin 1.2 V OVLO UVLO ton + tstart Figure 5. Disable on EN = 1 Figure 6. FLAG Response with EN = 1 http://onsemi.com 5 NCP349 TYPICAL OPERATING CHARACTERISTICS 50 ms ton and tstart version Figure 7. Startup Vin = Ch1, Vout = Ch3 Figure 8. Output Turn Off Time Vin = Ch1, Vout = Ch2 Figure 9. FLAG Going Up Delay Vout = Ch3, FLAG = Ch2 Figure 10. Alert Delay Vout = Ch1, FLAG = Ch3 Figure 11. Initial Overvoltage Delay Vin = Ch1, Vout = Ch2, FLAG = Ch3 Figure 12. Disable Time EN = Ch1, Vout = Ch2, FLAG = Ch3 http://onsemi.com 6 NCP349 TYPICAL OPERATING CHARACTERISTICS Figure 13. Inrush Current with Cout = 100 mF, I charge = 1 A, Output Wall Adaptor Inductance 1 mH Figure 14. Output Short Circuit Figure 15. Output Short Circuit (Zoom Fig. 14) http://onsemi.com 7 NCP349 CONDITIONS IN OUT VIN > OVLO 0 < VIN < UVLO And/Or VOLTAGE DETECTION /EN = 1 Figure 16. Simplified Diagram CONDITIONS IN OUT /EN = 0 & VOLTAGE DETECTION UVLO < VIN < OVLO Figure 17. Simplified Diagram Operation The NCP349 provides overvoltage protection for positive voltage, up to 28 V. A low RDS(on) NMOSFET protects the systems (i.e.: charger) connected on the Vout pin, against positive overvoltage. At powerup, with EN pin = low, the output is rising up ton soft-start after the input overtaking undervoltage UVLO (Figure 3). The NCP349 provides a FLAG output, which alerts the system that a fault has occurred. A tstart additional delay, regarding available output (Figure 3) is added between output signal rising up and to FLAG signal rising up. FLAG pin is an open drain output. http://onsemi.com 8 NCP349 Vout = 0 FLAG = Low Reset Timer Vin < UVLO or Vin > OVLO Vout = 0 FLAG = Low Timer Count OVLO > Vin > UVLO T < ton Timer Check T = ton Reset Timer Vin < UVLO or Vin > OVLO Check Vin FLAG = Low Timer Count UVLO < Vin < OVLO EN = 1 Vout = Open Check EN EN = 0 Vout = Vin Vin < UVLO or Vin > OVLO Timer Check T < ton T = ton UVLO < Vin < OVLO Check EN UVLO < Vin < OVLO EN = 1 Vout = Open FLAG = High Check Vin EN = 0 Vout = Vin FLAG = High Check Vin Vin < UVLO or Vin > OVLO Figure 18. State Machine http://onsemi.com 9 NCP349 Undervoltage Lockout (UVLO) ESD Tests To ensure proper operation under any conditions, the device has a built-in undervoltage lockout (UVLO) circuit. During Vin positive going slope, the output remains disconnected from input until Vin voltage is below UVLO, plus hysteresis, nominal. The FLAG output is tied to low as long as Vin does not reach UVLO threshold. This circuit has a built-in hysteresis to provide noise immunity to transient condition. Additional UVLO thresholds ranging from UVLO can be manufactured. Contact your ON Semiconductor representative for availability. Overvoltage Lockout (OVLO) The NCP349 input pin fully supports the IEC61000-4-2. 1.0 mF (minimum) must be connected between Vin and GND, close to the device. That means, in Air condition, Vin has a "15 kV ESD protected input. In Contact condition, Vin has "8.0 kV ESD protected input. Please refer to Figure 19 to see the IEC 61000-4-2 electrostatic discharge waveform. To protect connected systems on Vout pin from overvoltage, the device has a built-in overvoltage lockout (OVLO) circuit. During overvoltage condition, the output remains disabled as long as the input voltage exceeds typical OVLO. Additional OVLO thresholds ranging from OVLO can be manufactured. Contact your ON Semiconductor representative for availability. FLAG output is tied to low until Vin is higher than OVLO. This circuit has a built-in hysteresis to provide noise immunity to transient conditions. FLAG Output The NCP349 provides a FLAG output, which alerts external systems that a fault has occurred. This pin is tied to low as soon the OVLO threshold is exceeded or when the Vin level is below the UVLO threshold. When Vin level recovers normal condition, FLAG is held high, keeping in mind that an additional tstart delay has been added between available output and FLAG = high. The pin is an open drain output, thus a pull up resistor (typically 1 MW, minimum 10 kW) must be added to Vbat. Minimum Vbat supply must be 2.5 V. The FLAG level will always reflects Vin status, even if the device is turned off (EN = 1). EN Input Figure 19. Electrostatic Discharge Waveform PCB Recommendations The NCP349 integrates a 2 A rated NMOSFET, and the PCB rules must be respected to properly evacuate the heat out of the silicon. The pin 7 (exposed pad) is internally connected to the internal NMOS Drain (Input). This exposed pad must be used to increase heat transfer and must be connected to Pin 1. Of course, in any case, this pad shall be not connected to any other potential. Theta JA curve with PCB cu thk 1.0 oz Theta JA curve with PCB cu thk 2.0 oz Power curve with PCB cu thk 2.0 oz Power curve with PCB cu thk 1.0 oz 200 180 1.75 1.5 1.25 1 120 100 80 60 0 100 To enable normal operation, the EN pin shall be forced to low or connected to ground. A high level on the pin, disconnects OUT pin from IN pin. EN does not overdrive an OVLO or UVLO fault. Internal NMOS FET Theta JA (C/W) 160 140 The NCP349 includes an internal Low RDS(on) NMOS FET to protect the systems, connected on OUT pin, from positive overvoltage. Regarding electrical characteristics, the RDS(on), during normal operation, will create low losses on Vout pin. As example: Rload = 8.0 W, Vin = 5.0 V Typical RDS(on) = 65 mW, Iout = 618 mA Vout = 8 x 0.618 = 4.95 V NMOS losses = RDS(on) x Iout2 = 0.065 x 0.6182 = 25 mW 0.75 0.5 0.25 700 Copper heat spreader area (mm^2) 200 300 400 500 600 Figure 20. http://onsemi.com 10 Max Power (W) NCP349 ORDERING INFORMATION Device NCP349MNAETBG Marking AE Package DFN6 (Pb-Free) Shipping 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SELECTION GUIDE The NCP349 can be available in several undervoltage and overvoltage thresholds versions. Part number is designated as follows: NCP349MNxxTxG ab c Code a b c Contents UVLO Typical Threshold a: A = 2.95 V OVLO Typical Threshold b: E = 5.68 V Tape & Reel Type c: B = 3000 http://onsemi.com 11 NCP349 PACKAGE DIMENSIONS DFN6, 1.6x2, 0.5P CASE 506BM-01 ISSUE O D A B L1 DETAIL A L L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM THE TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.40 1.60 BSC 1.10 1.30 2.00 BSC 0.95 1.15 0.50 BSC 0.20 --- 0.15 0.35 --- 0.10 2X 2X 0.10 C TOP VIEW DETAIL B 0.05 C (A3) A A1 0.05 C NOTE 4 SIDE VIEW A1 D2 6X 3 C L SEATING PLANE DETAIL A 1 E2 K e BOTTOM VIEW 6 5 6X b 0.10 C A B 0.05 C NOTE 3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative http://onsemi.com 12 EEE CCC CCC DETAIL B 0.10 C EE EE EE PIN ONE REFERENCE E OPTIONAL CONSTRUCTIONS EXPOSED Cu MOLD CMPD A3 OPTIONAL CONSTRUCTION MOUNTING FOOTPRINT 1.30 0.43 6X 1.15 2.30 1 0.36 6X 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NCP349/D |
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